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Ankit Agrawal

Former function:	Ph.D Students
Company:

I am a PhD student. My research interests include real-time scheduling in multicore and manycore systems that share hardware resources like NoC, DRAM, etc. between cores. This research problem is of particular relevance in domains like avionics, automotive, railways, IoT, etc.

Since 2014, I have been involved in two EU-funded research projects, DREAMS and EMC².

Involved active Projects

EMC² - Embedded multi-core systems for mixed criticality applications in dynamic and changeable real-time environments (EU ARTEMIS) [more]

Latest Publications

REFEREED CONFERENCE AND WORKSHOP PAPERS

Ankit Agrawal, Renato Mancuso, Rodolfo Pellizzoni, Gerhard Fohler, Analysis of Dynamic Memory Bandwidth Regulation in Multi-core Real-Time Systems, 2018 IEEE Real-Time Systems Symposium (RTSS), IEEE, December 2018.

Ankit Agrawal, Gerhard Fohler, DRAM-related Challenges in Task Scheduling with Timing Predictability on COTS Multi-cores for Safety-Critical Systems, 3rd International Memory Symposium on Memory Systems (MEMSYS 2017), October 2017.

Ankit Agrawal, Gerhard Fohler, Johannes Freitag, Jan Nowotsch, Sascha Uhrig, Michael Paulitsch, Contention-Aware Dynamic Memory Bandwidth Isolation with Predictability in COTS Multicores: An Avionics Case Study, 29th Euromicro Conference on Real-Time Systems (ECRTS), June 2017.

Ankit Agrawal, Gerhard Fohler, Jan Nowotsch, Sascha Uhrig, Michael Paulitsch, Slot-Level Time-Triggered Scheduling on COTS Multicore Platform with Resource Contentions, 22nd Real-Time Embedded Technology & Applications Symposium Work-in-Progress Session, IEEE, Vienna, Austria, April 2016.

MISCELLANEOUS

Sascha Uhrig, Johannes Freitag, Gerhard Fohler, Ankit Agrawal, COTS Multicores in Avionic Applications, EMC2 Newsletter 4, November 2016.

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